Juergen Becker received the Diploma degree in 1992, and his Ph.D. (Dr.-Ing.) degree in 1997, both at Kaiserslautern University, Germany. His research work focused on application development environments for reconfigurable accelerators and included hardware/software codesign, parallelizing compilers, customized computing, and high-level synthesis. He has been local administrator for the European Design Project EUROCHIP in 1993/95. In 1997 Dr. Becker joined the Institute of Microelectronic Systems at Darmstadt University of Technology, Germany, as assistant professor, where he taught CAD algorithms for VLSI design. He did research in Systems-on-Chip (SoC) architectures and reconfigurable technologies for mobile communication systems, including the development of corresponding IP-based CAD methods. Since 2001 Juergen Becker is professor for embedded electronic systems at the Institut fuer Technik der Informationsverarbeitung (ITIV) at the University of Karlsruhe. He gives lectures in digital design (undergraduate), in CAD algorithms for high-level synthesis and VLSI design, hardware/software codesign, as well as in bus interfaces and protocols. His actual research is focused on industrial-driven SoCs with emphasis on adaptive embedded systems, e.g. dynamically reconfigurable hardware architectures. This includes corresponding hardware/software codesign and co-synthesis techniques from high-level specifications, as well as low power SoC optimization. Prof. Becker is managing co-director of the International Department at the University of Karlsruhe and co-director of the Electronic Systems and Microsystems (ESM) group at the Computer Science Research Center (FZI) at the University of Karlsruhe. He is author and co-author of more than 80 scientific papers, published in peer-reviewed international journals and conferences and active in several technical program and steering committees of international conferences and workshops. He is a Member of the german GI and Senior Member of the IEEE. Prof. Becker is chair of the GI/ITG Technical Committee of 'Architekturen fuer hochintegrierte Schaltungen'.