Alessandro Cornaglia (M.Sc.)
Research Scientist
Werdegang
- December 2016 - to date: Research Scientist at the Department of Microelectronic System Design (SiM), Karlsruhe - Germany
- 2016: JamaicaVM Software Engineer, aicas Realtime GmbH, Karlsruhe - Germany
- 2015-2016: Embedded SW Test Engineer, Selex ES (Finmeccanica Group), Genoa - Italy
- 2015: Master’s degree in Computer Science, University of Padua - Italy. Topics: Concurrent and Distributed Systems, Real-Time Systems and Embedded Systems
- 2012: Bachelor’s degree in Computer Science, University of Padua - Italy
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Interests
- SoftwareTiming Predictions
- Worst-Case Execution Time Analysis (WCET)
- Embedded systems
- HW Architectures
- Real-Time Systems
Publications
Conference Proceedings (4)
- SIMULTime: Context-sensitive Timing Simulation on Intermediate Code Representation for Rapid Platform ExplorationsDetails
Cornaglia, Alessandro and Viehl, Alexander and Bringmann, Oliver and Rosenstiel, Wolfgang, 2019
- MODELTime: Fully Automated Timing Exploration of Simulink Models for Embedded ProcessorsDetails
Cornaglia, Alessandro and Hasan, Md Shakib and Viehl, Alexander and Bringmann, Oliver and Rosenstiel, Wolfgang, 2019
- Ontology-Supported Design Parameter Management for Change Impact AnalysisDetails
Novacek, Jan and Ahari, Ali and Cornaglia, Alessandro and Haxel, Frederik and Viehl, Alexander and Bringmann, Oliver and Rosenstiel, Wolfgang, 2018
- Software-enforced Interconnect Arbitration for COTS MulticoresDetails
Ziccardi, Marco and Cornaglia, Alessandro and Mezzetti, Enrico and Vardanega, Tullio, 2015
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Kontakt
Telefon: +49 721 9654-434
E-Mail: cornaglia@fzi.de