Trace-based context-sensitive timing simulation considering execution path variations

Resource type
Conference
Author(s)
Sebastian Ottlik and Jan Micha Borrmann and Sadik Asbach and Alexander Viehl and Wolfgang Rosenstiel and Oliver Bringmann
Year
2016
Book title
2016 21st Asia and South Pacific Design Automation Conference (ASP-DAC)
Abstract
We present a fast and accurate timing simulation of binary code execution on complex embedded processors. Underlying block timings are extracted from a preceding hardware execution and differentiated by execution context. Thereby, complex factors, such as caches, can be reflected accurately without explicit modeling. Based on timings observed in one hardware execution, timing of numerous other executions for different inputs can be simulated at an average error below 5% for complex applications on an ARM Cortex-A9 processor.
Online Sources
http://dx.doi.org/10.1109/ASPDAC.2016.7428005
DOI
10.1109/ASPDAC.2016.7428005
Research focus
Software and Architecture Analysis, Virtual Prototyping and Life Cycle Management
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Published by
Sebastian Ottlik